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Verilog Coding and Simulations Course Outline:
  • Number Specification
  • Data Types
  • Memories
  • System Tasks
  • Port Connections
  • Gate level Modelling
  • Statements
  • Operators
  • Latches / Flip-Flops
  • Testbench Generation
  • File I/O
  • Control Flow
  • Functions
Examples :
  • Counter
  • LFSR
  • Signed Arithmetic
  • 8 bit Adder
  • 8 bit Multiplier
  • Shift Register
Course duration : 25 hrs



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